Generations in human terms come by pretty slowly, in living memory from ‘boomer’ thru X to millennials (Y?) and Z, and now weirdly ‘A’. I suppose they just ran out of letters. In semiconductors though, the generational progression is more rapid and SiC FETs are today now up to Gen 4 since the launch of the 750V SiC FETs in November 2020.
Gen 3 devices were market-leading and much has been written about their advantages over silicon and GaN devices, but SiC is still some way from its theoretical performance limits, so Gen 4 SiC FET cascodes inevitably came into the world with better performance still. Yet, the demand for the ever-faster switching with lower losses requires careful handling to avoid overshoots and ringing, making EMI mitigation an important consideration. Let’s recap the improvements and discuss some application challenges.
Gen 4 improvements on the radar
Gen 4 SiC FETs improve on Gen 3 in several ways, most easily illustrated by a ‘radar’ chart.
Taking a device of around 6 milliohms as a comparison, the first thing to notice is the increase in voltage rating to 750V. This gives a useful extra safety margin in rectified line applications, where the operating voltage can peak at well over 400V and surges and spikes can take it higher still. The reverse recovery energy Qrr is almost halved giving significant loss savings in hard-switched applications, with a similar reduction in total switching energy. Dynamic energy savings are as a result of a smaller die, giving a better Figure-of-Merit RDS(on) x A and the die size shrinkage by 35% over Gen 3 also improves wafer yield for better economy. To keep the thermal resistance from junction to case still reasonable with the smaller die, we use silver-sinter die attach and advanced wafer thinning techniques. Short-circuit withstand time is more than doubled, as is body diode surge current rating for the lowest on-resistance 750V/6mOhm FETs. Interestingly, the increase in on-resistance with temperature is higher than with Gen 3, but starts from a lower value and it is this effect which actually helps with short-circuit withstand time ratings. Also related, Gen 4 devices have a positive temperature coefficient of turn-on and turn-off switching energy, compared with negative for Gen 3, but the value for Eon is lower for Gen 4 than Gen 3 and they are similar for Eoff across rated operated conditions and temperature.
Generating EMI solutions
The blistering speed of SiC FETs is what’s needed to reduce dynamic losses, but with high di/dt and dV/dt comes the risk of high EMI from interaction with circuit parasitic inductance. This creates ringing and overshoot which can reduce voltage margins and make EMC compliance an issue, so edge-rate control is normally needed. Traditional solutions have involved introducing series resistance to drive the gate but this hurts efficiency, increases delay times and reduces minimum on-time and control range in high-frequency soft switching circuits. The better solution is a small RC snubber across drain to source, which limits overshoot and damps ringing without introducing extra losses. Look for the user guide on the website for some recommended values as starting points for different devices under different conditions with RC values that are surprisingly small. For soft-switched applications, just a capacitor is sufficient.
Paralleling SiC FETs can provoke oscillation in the gate circuit and a snubber helps to prevent this by reducing edge rates, but it is also recommended that separate gate resistors are used for each device and for on- and off-drive states. A series ferrite bead in the gate connection is also a secure solution, along with good practice in DC link decoupling for high frequencies and a robust gate driver with optimized voltages and local decoupling.
Gen 4 SiC FETs have a supporting family
They say every generation is more sophisticated than the last, with ‘Generation A’ no more than 12 years old, already more expert in IT than the vast majority of ‘boomers’. Gen 4 SiC FETs come with a plethora of supporting data, application notes and the UnitedSiC online FET-Jet Calculator™ able to guide your device selection and show real values for the performance improvements available.
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