Maximizing Solar Energy Efficiency with Three-Level Inverters

  • Jul 26, 2018
  • UnitedSiC

The economics of large solar farms are based on making money by selling energy to the grid. Energy-conversion efficiency and equipment costs are extremely important factors determining viability, and both are influenced by design choices that shape the inverter and associated power-conditioning electronics. Silicon carbide technology promises major gains in efficiency, but other factors have to be taken into consideration including the total number of power devices needed and their associated conduction/switching losses, and the size and cost of the devices in relation to voltage rating.

The inverter usually needs a DC/DC converter at its input, capable of acting in either buck or boost to ensure a stable DC link voltage as the panel output fluctuates. The inverter topology influences the design of the DC/DC converter circuitry, and both have a profound effect on the number of power switches needed and hence the BOM cost.

A basic six-pack three-phase inverter, comprising three pairs of high- and low-side transistors, may appear to be the simplest, lowest-cost solution, but this arrangement is known to produce a four-step common-mode voltage between the AC neutral and the DC input, of equal amplitude to the DC link voltage. In a large solar farm, this can cause unacceptable leakage current in the DC link. If the inverter specification calls for isolation, the transformer effectively prevents these leakage currents from flowing, but if isolation is not required, introducing a dedicated compensation transformer imposes unwanted additional cost and bulk.

The common-mode voltage, and hence the leakage current, can be dramatically reduced using a three-level inverter topology, without adding a transformer. Neutral Point Clamped (NPC) or Transistor-type Neutral Point Clamped (TNPC) topologies are usually considered. Extra switches are needed, which adds to losses, their associated drivers further raise the BOM cost, and controlling the inverter is a more complex challenge. On the other hand, designers get more freedom to optimize overall cost and inverter performance through device selection.

Real Design Choices

Consider a 50 kVA generator designed to have a nominal DC link voltage of 800 V, a 300-800 V input-voltage booster and 25 kHz operating frequency. Figure 1 compares the number of power switches needed to build such a converter/inverter using a standard two-level or either of the three-level inverter topologies. The design is based on power-loss analysis[1] [2], using switches connected in parallel to keep junction temperatures at least 25 °C below their stated maximum. The power-loss analysis assumes no electrical isolation between the semiconductors and heatsink.

Figure 1. Power-semiconductor component count for two-level and three-level inverters.

The TNPC circuit, comprising 12 UJ3C120040K3S 1200V SiC cascodes and six UJ3C065030K3S 650V SiC cascodes would appear to be the winner as far as total component count is concerned. Figure 2 shows a sample schematic, comprising the TNPC and a suitable booster at the input.

Figure 2. TNPC three-level inverter with non-isolated booster.

Compared to the TNPC, the diode-clamped NPC circuit (figure 3) has a higher semiconductor component count. The power analysis of figure 1 bears this out; the NPC inverter comprises 24 UJ3C065030K3S SiC cascodes and six UJ3D06560KS SiC Schottky diodes, whereas the TNPC circuit comprises 18 cascodes in total. But the NPC can be built using only 650V devices, which hints at the strength of this topology: it allows a higher DC-link voltage relative to the component ratings.

Figure 3. The NPC inverter can sustain higher input voltages using lower-voltage components.

If the DC-link voltage is 800 V, the TNPC requires 1200 V switches to ensure adequate voltage margin for avoiding single-event burnout (SEB) of the power devices. In the NPC topology, they only have to be 650 V. With 1200 V parts, the NPC can work with input voltage up to 1500 V. If the reliability model were to call for a generous voltage margin, or if a DC link voltage over 1000 V is required, the argument in favor of the NPC inverter and three-level booster is compelling.

SiC Cascode Advantages

Using UnitedSiC cascodes in the inverter and booster circuits brings further advantages, in addition to their increased energy efficiency, thermal ruggedness and breakdown voltage vs. die size. In the inverter, UJ3 series cascodes can be held on with just 10 V, or even less, which helps ensure adequate holdup time if bootstrap gate-drive power is used. For fast switching times, the gate voltage should be +15-18 V for turn-on, and -5 V for turn-off.

In addition, using cascodes in place of diodes in the booster means the booster-plus-inverter can process power in two directions. The cascodes can act as a switch or as a diode depending on the direction of power flow, so the system can perform as a DC-to-AC inverter or an AC-to-DC active front end rectifier, which may be needed if the solar generator is to store energy or power a UPS. Heat loading changes between inverter and rectifier modes, so device count would need to be equal for each switch position in the booster.

Overall, SiC cascodes – with their combination of high energy efficiency, ruggedness and fast switching performance – give designers greater flexibility to manage switching frequency, DC-link voltage, reliability and BOM cost in systems using either two-level or three-level booster/inverter topology. A TNPC inverter is usually preferred where a three-level topology is used to minimize common-mode voltages in non-isolated designs. The NPC topology is a strong choice where higher input voltages are required.

[1]        M. Schweitzer, I. Lizama, T. Friedli, J. Kolar; “Comparison of the Chip Area Usage of 2-level and 3-level Voltage Source Converter Topologies”, IECON 2010 – 36th Annual Conference on IEEE Industrial Electronics Society

[2]        I. Staudt; “3L NPC & TNPC Topology”, Semikron Application Note AN-11001, 2015-10-12